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What is nonmaskable interrupt? TRAP is the nonmaskable interrupt in It has the highest priority among Interrupt signal. When this interrupt is triggered, the program control is transferred to location H without any hardware or Interrupt enable instruction EI.
What are the different ways to disable the interrupt processs? The entire interrupt process is disabled by resetting the interrupt enable flip-flop. The flip-flop can be reset in one of 3 ways. Instruction DI ii. System Reset iii. Recognition of an interrupt request What do you mean by vectored interrupts? The vectored interrupts are automatically vectored to specific locations on memory without any external hardware.
In , there are 4 vectored interrupts. The interrupts and their call locations are listed below. Differentiate between Absolute and partial decoding. As a result the device has multiple addresses.
Write a time delay program using bit register. What is simplex and duplex transmission? Simplex transmission: data are transmitted in only one direction.
Duplex transmission: data flow in both directions. If the transmission goes one way at a time, it is called half duplex; if it goes both way simultaneously, then it is called full duplex. Define Baud. The rate at which the bits are transmitted, bits per second is called Baud.
SID — serial input data 3. What are the signals available for serial communication? SOD — serial output data 4. What is the use of checksum technique? The checksum technique is used when blocks of data are transferred.
It involves adding all the bytes in a block without carries. RTS — Request to send 5. It is the output from data terminal equipment DTE. It can be used as a handshake signal. CS — chipselect 7. Write the control signals inA. It is a programmable device. What is use of control register?
It is a bit register used to store the control word. The control word consists of 2 independent bytes: the first byte is called mode instruction and the second byte is called command instruction. Write the features of A. What is BSR mode?
All functions of are classified according to 2 modes. The BSR mode is used to set or reset the bits in port C. What is mode 0 operation of Each port can be programmed to function as an input port or an output port.
What are the modes of operation supported by ? Bit set reset mode BSR ii. Write the control word format for BSR mode. What is the function of STB signal? This signal is generated by a peripheral device to indicate that it has transmitted a byte of data. What is the function of IBF signal? IBF Input buffer full : This signal is an acknowledgement by the A to indicate that the input latch has received the data byte.
What is mode2 operation? In this mode, port A can be configured as the bidirectional port and port B either In mode 0 or mode1. The electronic circuit that translates an analog signal into a digital signal is called analog-to-digital converter ADC. The electronic circuit translates a digital signal into an analog signal is called Digital-to-analog converter DAC. Define conversion time. It is defined as the total time required to convert an analog signal into a digital output.
It is determined the conversion technique used and by the propagation delay in various circuits.
Wait until the end of conversion iii. Read the digital signal at an input port. Write the different types of ADC. Single slope ADC ii.
Dual slope ADC iii. Successive approximation ADC iv. Parallel comparator type ADC v. Counter type ADC What is resolution time in ADC? It is defined as a ratio of change in value of input voltage Vi, needed to change the digital output by 1 LSB.
List the functions performed by It has built-in hardware to provide key debounce. It provides a scanned interface to a 64 contact key matrix.
It provides multiplexed display interface with blanking and inhibit options. It provides three input modes for keyboard interface. What is key debounce?
The push button keys when pressed, bounces a few times, closing and opening the contacts before providing a steady reading. So reading taken during bouncing may be faulty. Therefore the microprocessor must wait until the key reach to steady state. This is known as key debounce. What are the operating modes in ? Scanned keyboard mode ii. Scanned sensor matrix iii.
Strobed input. What is N-key rollover? In N-key rollover each key depression is treated independently from all others. When a key is depressed, the debounce logic is set and checks for key depress during next two scans. Write the features of RS It operates in single-ended mode. The maximum cable length can be up to 50 feets. Ti supports maximum data rate of up to 20 K. Write the features of I2C bus. Two bus lines are required, serial data line and serial clock line. Onchip filtering rejects spikes on the bus data line to preserve data Integrity.
The mode of operation in RS is single —ended mode. What is the mode of operation in RS? What are the advantages I2C bus. Good for communication with onboard devices that are accessed occasionally.
Easy to link multiple devices because of addressing schemes. Cost and complexity do not scale up with the no. What are the applicationsof I2C. It is used as the control interface to signal processing devices that have Separate data interfaces, e.
RF tuners, video decoders and encoders and Audio processors. What are the operation modes of standard-mode I2C bus. Fast mode ii. High speed mode iii. What are the output modes in ?
Left entry ii. Right entry What is strobed input mode? What is the internal operating frequency of ? How can you derive it from Clock signal? All timing and multiplexing signals for are generated by an internal Prescaler. This prescaler divides the external clock by a programmable integer Value given in the programclock command word, to generate internal frequency.
To give proper Scan and key debounce times, the internal frequency should be kHz. Find the program clock command word if external clock frequency is 2 MHz.
What is the voltage level used in RS? What is the ATN signal? When ATN is high, the data bus contains data or a status byte. What are the management lines in GPIB bus? What are the functional parts of CPU? The two independent functional parts of the CPU are: i. Bus Interface Unit BIU : BIU sends out addresses, fetches instruction from memory, reads data from ports and memory and writes data to ports and memory.
What is the purpose of a decoder in EU? The decoder in EU translates instructions fetched from memory into a series of actions, which the EU carries out.
Give the register classification of The contains: i. General purpose registers: They are used for holding data, variables and intermediate results temporarily. They are used as segment registers, pointers, index register or as offset storage registers for particular addressing modes. What are general data registers?
AX register is used as bit accumulator. BX register is used as offset storage for forming physical addresses in case of certain addressing modes. CX register is used as a default counter in case of string and loop instructions. DX register is used as an implicit operand or destination in case of a few instructions. Give the different segment registers. The four segment registers are: i.
Code segment register: It is used for addressing a memory location in the code segment of the memory, where the executable program is stored. Data segment register: It points to the data segment of the memory, where data is resided. Extra segment register: It also contains data. Stack segment register: It is used for addressing stock segment of memory. It is used to store stack data. What are pointers and index registers? IP, BP and SP are the pointers and contain offsets within the code, data and stack segments respectively.
SI and DI are the index registers, which are used as general purpose registers and also for offset storage in case of indexed, based indexed and relative based indexed addressing modes. How is the physical address calculated? Give an example. The physical address, which is bits long is calculated using the segment and offset registers, each bits long. The segment address is shifted left bit-wise four times and offset address is added to this to produce a 20 bit physical address.
What is pre-decoded instruction byte queue? To make use of the external bus when the processor internally executes the instruction, the external bus is used to fetch the machine code of the next instruction and arrange it in a queue called as pre-encoded instruction byte queue. What is meant by memory segmentation? Memory segmentation is the process of completely dividing the physically available memory into a number of logical segments.
Each segment is 64K byte in size and is addressed by one of the segment register. What are the advantages of segmented memory? The advantages of segmented memory are: i. Allows the memory capacity to be 1Mbyte, although the actual addresses to be handled are of bit size. Allows the placing of code, data and stack portions of the same program in different parts of memory for data and code protection.
What is pipelining? Fetching the next instruction while the current instruction executes is called pipelining. What are the two parts of a flag register? The two parts of the 16 bit flag register are: i. Condition code or status flag register: It consists of six flags to indicate some condition produced by an instruction. Machine control flag register: It consists of three flags and are used to control certain operations of the processor.
Draw the format of flag register. Explain the three machine control flags.
Trap flag: If this flag is set, the processor enters the single step execution. If this flag is set, the markable interrupts are recognized by the CPU, otherwise they are ignored. Direction flag: This is used by string manipulation instructions. Otherwise, the string is processed from highest address to lowest address, i. Draw the pin configuration of What are the three groups of signals in ? The signals are categorized in three groups. They are: i.
The signals having common functions in minimum and maximum mode. The signals having special functions for minimum mode. The signals having special functions for maximum mode. What are the uses of AD15 — AD0 lines? Text Book: Douglas V. Reference Book s :. Brey, Latest Edition. Mazidi, "Programming, Interfacing and Design using ". Course Objective:. Brey , Pearson Education. Charles M. Hill, Hall 7. Hall, Microprocessors And Interfacing. Hall, Microprocessors and interfacing programming and Hardware, Tata.
McGraw-Hill, Rector, R. Yu-cheng Liu and Glenn A.
Architecture programming and design, PHI, India, Suggested Reading: 1. Revised rd edition, Krishna Kant -Microprocessors and Microcontrollers -Architecture,. Programming and System Design ,,,, Prentice —Hall. India Ayala -"The Microcontroller.
Hall , Microprocessors Interface,. Penram International Publication India Pvt. Yu-cheng Liu, Glenn A. Hall, Microprocessors and Interfacing: Programming and. UNIT V. Hall, Tata McGraw Hill.
Comparison of features of Intel Processors: from to Pentium. Microprocessor Architecture, Programming and Applications with ,. Ramesh S. Gaonkar, Penram International Publishing India. Microprocessors and Interfacing programming and Hardware-Douglas V.
Microprocessors and Microcontrollers. Programming and Applications … Ramesh S. The Processors: Architectures, Pin Diagrams and Timing Diagrams 2. Special Architectural Features and Related Programming 5. Multimicroprocessor Systems 9. A Microprocessor with Memory Management and Protection The Bit Processors Recent Advances in Microprocessor Architectures? A Journey from Pentium Onwards Pentium 4? Processor of the New Millennium RISC Architecture?
An Overview Microprocessor-Based Aluminium Smelter Control Design of an Electronic Weighing Bridge An Introduction to Architecture and Programming and Bookseller Inventory Ask Seller a Question. Bibliographic Details Title: Ltd Publication Date: